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| SM339 Quadruple Differential Comparator FEATURES Single or dual supplies Low Input Bias Current : 25nA Output Compatible with TTL, MOS, and CMOS Input Common-Mode Voltage Range to Ground Low Input Offset Voltage Low Input Offset Current Low Output Saturation Voltage Wide Supply Voltage Range DIP-14 SOP-14 PRODUCT DESCRIPTION The SM339 are designed for use in level detection, low-level sensing and memory applications in consumer automotive and industrial electronic applications. The SM339 consists of four independent voltage comparators designed to operate from single power supply over a wide voltage range. www..com PIN CONFIGURATION 14 13 12 11 10 9 8 Inp ut 4(-) Inp ut 3(+ ) Inp ut 3(-) ORDERING INFORMATION Part Number SM339N SM339S Operating Temperature Range -25~+85 -25~+85 Package Type DIP-14 SOP-14 Output 2 Output 1 Vc c 1 2 3 4 Output 3 Output 4 GND Inp ut 1(+ ) Inp ut 2(-) Inp ut 2(+ ) 5 6 7 OEI 1/ 5 SM339 Quadruple Differential Comparator ABSOLUTE MAXIMUM RATING Characteristics Power Supply Voltage Input Differential Voltage Range Input Common Mode Voltage Range Output Short Circuit-to-Ground Power Dissipation t=25 Above 25 Operating Ambient Temperature Range Storage Temperature Range SYMBOL VCC VIDR VICR ISC PD TA TS Value +36 or 18 36 -0.3 to +36 Continuous 1.0 8.0 -25 to 85 -65 to 150 Unit V V V mA W mW/ Note 1. The max. output current may be as high as 20mA, independent of the magnitude of Vcc, output short circuits to Vcc can cause excessive heating and eventual destruction. 2. This magnitude of input current will only occur if the leads are driven more negative than ground or the negative supply voltage. This is due to the input PNP collector base junction becooming forward biased, acting as an input clamp diode. There is also a lateral PNP parasitic transistor action which can cause the output voltage of the comparators to go to the Vcc voltage level ( or ground if overdrive is large ) during the time that an input is driven negative. This will not destroy the device when limited to the max rating and normal output states will recover when inputs become > ground or negative supply. 3. At the output switch point, VO=1.4Vdc, RS=100 with Vcc from 5.0 Vdc to 30 V, and over the full input common mode range ( 0V to Vcc= -1.5V ). 4. Due to the PNP transistor inputs, bias current will flow out of the inputs. This current is essentially constant, independent of the output state, therefore, no loading changes will exist on the input lines. 5. Response time is specified with a 100mV step and 5.0mV of overdrive. For larger signals, 300ns is typical. 6. Positive excursions of input voltage may exceed the power supply level. As long as one of the inputs remain within the common-mode range, the comparator will provide the proper output state. CIRCUIT SCHEMATIC www..com Vcc +Input -Input Output Gnd (Diagram shown is for 1 comparator) OEI 2/ 5 SM339 Quadruple Differential Comparator ELECTRICAL CHARACTERISTICS (Vcc=5.0Vdc, 0< TA < 25, unless otherwise noted ) Characteristics Input Offset Voltage (3) Input Bias Current (3,4) Input Offset Current (3) TA=25 TA=0 to 70 TA=25 TA=0 to 70 TA=25 TA=0 to 70 Symbol VIO IIB IIO Min ------------0 0 ------------6.0 ISink 1.3 16 ----mA Typ 2.0 --25 --5.0 ------0.8 1.0 200 300 Max 5.0 9.0 250 400 50 150 Vcc -1.5 Vcc -2.0 2.0 2.5 ----ns Unit mV nA nA Input Common Mode Voltage Range (6) TA=25 TA=0 to 70 Supply Current RL=, TA=25 RL=, Vcc=30Vdc Voltage Gain RL > 15K, Vcc= 15V Large Signal Response Time V1 = TTL Logic Swing. Vref = 1.4Vdc VRL= 5.0 Vdc, RL= 5.1K Response Time (6) VRL= 5.0 Vdc, RL= 5.1K www..com Output Sink Current VICR V ICC AVOL mA V/mV tTLH s V1 (-) > 1.0Vdc, V1(+) =0 Vdc Vo < 1.5 Vdc Saturation Voltage V1 (-) > 1.0Vdc, V1(+) =0 Vdc ISink< 4.0 mA, TA=25 0 VSAT ------- 130 --0.1 ----- 400 700 --- mV IOL ----VID 1000 Vcc nA V OEI 3/ 5 SM339 Quadruple Differential Comparator ELECTRICAL CHARACTERISTICS CURVES Fig 1.Normalized input offset voltage Fig 2.Input bias current www..com Fig 3.Output sink current versus output saturation voltage APPLICATION INFORMATION These dual comparators feature high gain , wide bandwidth characteristics. This gives the device oscillation tendencies if the outputs are capacitively coupled to the inputs via stray capacitance. This oscillation manifests itself during output transitions (VOL to VOH ). To alleviate this situation , input resistors<10k should be used. The addition of positive feedback(<10mV) is also recommended. It is good design practice to ground all unused pins. Differential input voltages may be larger than supply voltage without damaging the comparator's inputs. Voltages more negative than-0.3V should not be used. OEI 4/ 5 SM339 Quadruple Differential Comparator +15V Zero Crossing Detector (Split Supply) 10K +Vcc R4 8.2K R1 D1 Vin 220K R2 6.8K R5 220K + Vin(min) Vin O 10K - 10M Vin D1 prevents input from going negative by more than 0.6V R1+R2=R3 R3<=(R5/10) for small error in zero crossing -V EE -V EE Vin(min) ~ 0.4V peak for 1% phase dist ort ion( O) ~ Fig 4.Zero crossing detector(single supply) Square Wave Oscillator Vcc>4.0V Fig 5.Zero crossing detector(split supply) Driving Logic Vcc 10K 100K R1 Rs Vin Vo C R2 330K R4 R3 Vcc 330K 330K www..com Fig 6.Square wave oscillator Inverting Comparator With Hysteresis +Vcc Vref R2 1.0M 10K R1 R2 Vcc R1 Vref ~ Rref+R1 R3 ~ R1//Rref//R2 R1//Rref VH = R1//Rref+R2 [Vo(m ax)-Vo(min)] R2> Rref//R1 Vin 10K Fig 8.Inverting comparator with hysteresis Fig 9.Non-Inverting comparator with hysteresis OEI - + + +Vcc Rref - Vin R3 10K + + Vref R1 Vcc T1 T2 T 1=T 2=0.69RC f ~ 7.2 C(uF) R2=R3=R4 R1~ R2//R3//R4 ~ Non-Inverting Comparator With Hysteresis +Vcc 10K Rref Vref Vo R1 + 15K R3 . Vcc Vo O O RL + . . Rs=Source Resist ance _ R1~Rs Logic CMOS TTL Dev ice 1/4MC14001 1/4MC7400 Vcc (V) +15 +5.0 RL k 100 10 Fig 7.Driving logic 10K Vo Vref= R3 1.0M Vcc R1 Rref+R1 R2~ R1 //Rref - VH = Am o un t o f Hy steresis VH R2 [Vo (m ax )-Vo (m in )] R2 +R3 5/ 5 |
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